In view of cost and yield, it is very attractive to integrate a photo-detector into a monolithic integrated circuit by applying a technique of silicon electronics. A photo-detector made of silicon or germanium, which is monolithically integrated with a CMOS circuit on the same chip, is an attractive substitute for a hybrid photo-detector, such as an InGaAs photodiode, which is joined to a CMOS circuit or a GaAs circuit. The photo-detector that is formed in the shape of monolithically integrated circuit can be manufactured by using a standard silicon process, and hence is expected to be able to be manufactured at lower cost in comparison with that of the hybrid design.
A photodiode is very often used as means to convert an optical signal into an electric signal at high speed. A typical one is a pin-type photodiode. The pin-type photodiode is constructed in such a structure in which a i-layer of an intrinsic semiconductor is sandwiched between a p-layer of a p-type semiconductor and an p-layer of an n-type semiconductor. At the time of operation of the pin-type photodiode, a reverse bias voltage VR supplied from a bias power source is applied between the p-layer and the n-layer of the diode, so that substantially the whole region of the high resistance i-layer is converted to a layer of charge carrier depletion. An electric field exists in the depleted i-layer.
At such a case, when a photon having energy larger than the band gap Eg of the semiconductor composing the i-layer is incident and absorbed in the i-layer, electron-hole pairs are generated. The generated electrons and holes are accelerated by the electric field existing in the depleted i-layer, so that the electrons are drifted in the direction of the n-layer, and the holes are drifted in the direction of the p-layer. At that step, when the electrons and the holes encounter each other, they again form electron-hole pairs and disappear due to recombination between them. The concentrations ni and pi of the residual free carriers in the depleted i-layer are ni≈0 and pi≈0. Thus, it is possible to neglect that the concentrations nph and pph of the photo-carriers generated by the photo-absorption are reduced due to the recombination between the photo-carriers and the residual free carriers. When electrons generated by the photo-absorption reach the n-layer, they are outputted as “photocurrent” from the photodiode. The amount of the outputted “photocurrent” corresponds to the amount of photons (“absorbed photon amount”) which are absorbed in the i-layer to generate the electron-hole pairs. The amount of the outputted “photocurrent” Iph, which is converted by a load resistor Rload into a voltage, is detected as a signal voltage of Vsignal (=Iph·Rload).
The main factors which limit the response speed of the optic-to-electric conversion by the pin type photodiode are the time constant of the circuit, which is determined by the product (Rload·C) of the load resistor Rload and the electric capacitance C formed by the depletion layer, and the carrier travelling time, which is required for the electrons and holes to pass through the depletion layer.
On the other hand, a photo-detector having sensitivity in a wavelength range from the 1.3 μm band to the 1.55 μm band is required in order to perform optical fiber communication at very high speed and over a long distance. Conventionally, a photo-detector using a compound semiconductor based material, such as InGaAs, has been used. However, by the use of SiGe or Ge which have sensitivity in the wavelength range from the 1.3 μM band to the 1.55 μM band, it has become possible to realize a low cost photo-detector to which a silicon process can be applied.
In a process of manufacturing a p-i-n type Ge photodiode, a Ge layer is, for example, selectively epitaxially grown on a highly doped Si layer by using SiO2 as a mask, and then an upper electrode layer is further grown to laminate thereon, and thereby, a mesa structure is produced. Alternatively, after a heavy doped layer used as an electrode is formed on a planar substrate, a Ge layer is epitaxially grown thereon; an upper electrode layer is further grown to laminate thereover, and then, the layers are etched to produce a mesa structure therefrom.
In a pin type Ge photodiode disclosed in Non-Patent Document 1, a mesa structure is produced in such a manner that, after three-layered structure composed of p+-Ge/i-Ge/n+-Ge layers is laminated on Si with a buffer layer underlying thereunder, a mesa structure is formed therefrom by reactive etching using CF4 gas. A passivation film made of SiO2, which covers over the side edge surface of the mesa structure, is formed by a plasma CVD method to suppress the dark current (surface leakage current: Isurface-leak) flowing through the surface of the side end thereof. It is reported that a high speed response of 3 dB frequency f3dm=about 39 GHz is obtained for an optical signal of a wavelength of λ=1.55 μm, in the case where the film thickness of i-Ge layer di=1 μm, the mesa diameter rmesa=5 μm, the load resistance Rload=50Ω, and the applied bias VR=−2V are chosen therefor.
A pin type Ge photodiode disclosed in Non-Patent Document 2 is a waveguide coupling type Ge photodiode formed on a rib type Si waveguide. In the production step of the pin type Ge photodiode, a mask for selective growth is formed by patterning a SiO2 film deposited on the surface of the Si waveguide, and then an i-Ge layer is selectively grown on a part of a p+ type Si waveguide. The light guided by the rib type Si waveguide is highly efficiently absorbed by the i-Ge layer laminated thereon. CMP processing is performed to flatten the selectively grown Ge layer, so that the film thickness of the Ge layer is set to 0.8 μm. Then, P is ion-implanted into the surface of the Ge layer to form an n+ Ge layer, so that a waveguide coupling type Ge photodiode having a p+-Si/i-Ge/n+-Ge structure is produced.
In a pin type Ge photodiode disclosed in Non-Patent Document 3, a tensile distortion is introduced into a Ge layer deposited on the surface of a Si substrate by forming a C54-TiSi2 layer on the rear surface of the substrate, so as to reduce the direct transition band gap Eg (Γ) of the Ge layer. Thereby, the photo-sensitivity equivalent to that of the InGaAs based photodiode as a conventional device is obtained in the C band (the wavelength of 1528 to 1560 nm) and the L band (the wavelength of 1561 to 1620 nm), which are the wavelength bands used in the wavelength multiplexed optical communication.
Patent Document 1 discloses a structure in which a Si/SiGe superlattice layer, which is used as a light absorbing layer of a photo detector, is formed by selective epitaxial growth in a recessed section formed in a substrate, of which side wall is coated with a side wall oxide film.
Further, Patent Document 2 discloses a photodetector in which a Si layer is used as a waveguide so that light from an optical fiber is guided into the waveguide, and in which a Si/SiGe superlattice layer is formed in a recessed section that is formed in the Si layer.
Patent Document 3 discloses a claimed invention relating to selection of a film thickness, in which claim the side wall of the recessed section of the Si layer is oxidized, so as to reduce the influence of the level difference due to the facet of the Si/SiGe superlattice layer that is epitaxially grown on the bottom section of the recessed section.
Nonpatent Document 1: M. Oehme, J. Werner, E. Kasper, M. Jutzi, and M. Berroth, “High bandwidth Ge p-i-n photodetector integrated on Si”, Applied Physics Letters, Vol. 89, 07117 (2006) (NO. 071117—p. 1, FIG. 1)
Nonpatent Document 2: T. Yin, R. Cohen, M. M. Morse, G. Sarid, Y. Chetrit, D. Rubin, and M. J. Paniccia, “31 GHz Ge n-i-p waveguide photodetectors on Silicon-on-Insulator substrate”, Optics Express, Vol. 15, 13965, (2007) (p. 13967, FIG. 1)
Nonpatent Document 3: J. Liu, D. D. Cannon, K. Wada, Y. Ishikawa, S. Jongthammanurak, D. T. Danielson, J. Michel, and L. C. Kimerling, “Tensile strained Ge p-i-n photodetectors on Si platform for C and L band telecommunications”, Applied Physics Letters, Vol. 87, 011110, (2005) (No. 011110—p. 1, FIG. 1, No. 011110—p. 2, FIG. 2)
Patent Document 1: JP10-270746 A (p. 5, FIG. 1)
Patent Document 2: JP09-205222 A (p. 7, FIG. 2)
Patent Document 3: JP10-163515 A (p. 7, FIG. 1)